Core Placement Optimization for Multi-chip Many-core Neural Network Systems with Reinforcement Learning

On-chip Network-enabled Many-core Architectures

Skeletons for multi/many-core systems

We discuss how algorithmic skeletons (and structured parallel programming models in general) can be used to efficiently and seamlessly program multicore as well as many-core systems. We introduce a new version of the muskel skeleton library that can be used to target multi/many-core systems and we present experimental results that demonstrate the feasibility of the approach. The experimental re...

Efficient parallelization of the genetic algorithm solution of traveling salesman problem on multi-core and many-core systems

Efficient parallelization of genetic algorithms (GAs) on state-of-the-art multi-threading or many-threading platforms is a challenge due to the difficulty of schedulation of hardware resources regarding the concurrency of threads. In this paper, for resolving the problem, a novel method is proposed, which parallelizes the GA by designing three concurrent kernels, each of which running some depe...

PHENIC: Towards Photonic 3D-Network-on-Chip Architecture for High-throughput Many-core Systems-on-Chip

Network-on-chip architectures can improve the scalability, performance, and power efficiency of general multiprocessor systems and application-specific heterogeneous multicore and many-core SoCs (MCSoCs). This interconnection paradigm when combined with 3D integration technology offers advantages over 2D NoC design, such as shorter wire length, higher packing density, and smaller footprint. How...

On-Chip Network Designs for Many-Core Computational Platforms

Processor designers have been utilizing more processing elements (PEs) on a single chip to make efficient use of technology scaling and also to speed up system performance through increased parallelism. Networks on-chip (NoCs) have been shown to be promising for scalable interconnection of large numbers of PEs in comparison to structures such as point-to-point interconnects or global buses. Thi...